Senior Fab Process Engineer, Etch

The challenge

High-aspect-ratio contact hole etch at an advanced node is showing tilt variability across the wafer well above spec. The target is <2%. Developing the process recipe and hardware tuning to get there.

Role overview

You own the etch process development and production support for advanced logic nodes. Recipe development, hardware tuning, defect data analysis, and yield optimization. The day splits between the cleanroom and the data analysis workstation -- and the pager goes off when an excursion hits.

Specializations

Technical requirements

• MS or PhD in Chemical Engineering, Materials Science, Physics, or Electrical Engineering
• 6+ years in semiconductor process engineering, with 4+ years in etch processes
• Hands-on experience with Lam Research or TEL etch platforms
• Understanding of plasma physics and etch chemistry (fluorocarbon, chlorine, bromine chemistries)
• Proficiency in SEM, TEM, and OCD metrology for etch profile characterization
• Experience with DOE methodology and statistical process control

Key responsibilities

• Develop and optimize plasma etch recipes for high-aspect-ratio features at advanced technology nodes
• Characterize and qualify etch processes for critical patterning layers (gate, contact, via, metal)
• Analyze etch uniformity, selectivity, and profile data using SEM, TEM, and OCD metrology
• Drive equipment performance improvements through gas flow, RF power, and ESC tuning
• Investigate and resolve etch-related defect modes during yield ramp
• Develop SPC monitoring strategies and establish process control limits for production recipes

Compensation & Benefits

• Base salary: $160,000 - $195,000
• Sign-on bonus ($15,000)
• Relocation package (up to $50,000 for domestic moves)
• Clean room shift differential when applicable
• On-site housing assistance for first 6 months