Senior ASIC Design Engineer, AI Accelerator
An AI hardware startup with a shipping product and designing the next-generation architecture.
An established, publicly traded analog semiconductor company with a Boston-area mixed-signal design center, shipping precision sensing and signal-chain ICs into industrial and automotive markets.
An analog design team at the Boston-area design center, working alongside layout designers, AMS verification, and product and test engineering. You report to the analog design manager.
A precision ADC sub-block that holds its linearity across corners in simulation still has to hold it on real silicon, on the bench, across temperature. Monte Carlo said the mismatch budget closes. The bandgap drifts anyway, and the datasheet number with your name behind it has to be the number the part hits in production test.
Block-level analog design from architecture trade-offs to silicon: amplifiers, bandgap references, bias circuits, and data converter sub-blocks, designed at the transistor level in Cadence Virtuoso and simulated in Spectre across corners and Monte Carlo. You supervise IC layout rather than doing it, run post-layout extraction simulations, and take your blocks through silicon bring-up, characterization, and lab evaluation until the datasheet specifications are real numbers. Precision is the discipline: noise, mismatch, linearity, stability and compensation.
An AI hardware startup with a shipping product and designing the next-generation architecture.
A communications equipment manufacturer building high-throughput signal processing systems on large-scale FPGA platforms.
A semiconductor manufacturer ramping a new advanced-node fab with 300mm wafer production in the US.
Senior Analog/Mixed-Signal Design Engineer
$158K - $170K base